Seminars, Workshops, Classes
2023
[1] R. B. Staszewski, “DAC/ADC Building Blocks”, IEEE SSCS Hybrid Course (3 hours) at AGH University of Science and Tech- nology, Krakow, Poland, 14 Dec. 2023. [IEEE vTools link]
[2] R. B. Staszewski, “Once in a Lifetime Opportunity: Mixed-Signal and Quantum Computing Shaping Thai IC Innovation”, Keynote speech (0.5-hr) presented at Thailand’s Hub of Talents in Microelectronic Design (THTMD), Sponsored by National Research Council of Thailand (NRCT), Bangkok, Thailand, 3 Nov. 2023.
[3] R. B. Staszewski, “Quantum Computing in Nanoscale CMOS”, Keynote speech (0.5-hr) presented at 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Hefei, Anhui Province, China, 28 Oct. 2023.
[4] R. B. Staszewski, “Time-domain Paradigm of Analog and RF Design using Advanced CMOS Technology”, IEEE SSCS & Electron Devices Society, seminar (1-hr) presented at University of Science and Technology of China (USTC), Hefei, Anhui Province, China, 27 Oct. 2023."
[5] R. B. Staszewski, “Reality and Perception — Quantum Physics and Buddhist Perspectives”, Seminar and panel discussion (2.5 hours, 4 panelists), Karma Dechen Choling (KDC) Center, Warsaw, Poland, 18 Oct. 2023.
[6] R. B. Staszewski, “DAC/ADC Building Blocks”, IEEE SSCS Hybrid Course (3 hours) at AGH University of Science and Tech- nology, Krakow, Poland, 13 Oct. 2023. [IEEE vTools link]
[7] R. B. Staszewski, “Time-domain Paradigm of RF and Quantum SoC using Advanced CMOS Technology”, Seminar (1-hr) pre- sented at Rensselaer Polytechnic Institute (RPI), Troy, NY, USA, 27 Sept. 2023.
[8] R. B. Staszewski, “Time-domain Paradigm of Analog and RF Design using Advanced CMOS Technology”, and “Quantum Computing in Nanoscale CMOS”, Seminars (2-hr) presented at Nash Lecture Theatre, King’s College London, London, UK, 1 Sept. 2023.
[9] R. B. Staszewski, “Quantum Computer on a Chip”, Webinar at Department of Electronic Science and Technology at Harbin Institute of Technology (at Weihai) for celebrating 20th anniversary of the department, 17 Jun. 2023. (Pre-recorded)
[10] R. B. Staszewski, “CMOS for Quantum Computing”, Industry seminar (1.5-hr) presented at TSMC worldwide as part of MRSD Technology X-talk-Monthly Seminar, 14 Jun. 2023. (Virtual)
[11] R. B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, and “Quantum Computing in Nanoscale CMOS”, Seminars (2-hr) presented at Tokyo Institute of Technology, Okada Lab, Tokyo, Japan, 9 Jun. 2023. [TokyoTech blog link]
[12] B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, Seminar (60-min) presented at Silicon Austria Labs seminar space, JKU Science Park, Johannes Kepler University (JKU), Linz, Austria, 17 Apr. 2023.
[13] B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, Seminar (45-min) presented at 26th Workshop on Advances in Analog Circuit Design (AACD), Villach, Austria, 14 Apr. 2023. [Workshop link]
[14] R. B. Staszewski, “Introduction to System and Circuit Design of Analog-to-Digital Converters”, IEEE SSCS Tutorial (2.5 hours) at AGH University of Science and Technology, Krakow, Poland, 20 Mar. 2023. [IEEE vTools link]
[15] R. B. Staszewski, “Quantum Computer on a Chip”, Seminar (1-hr) presented at Kasetsart University during a full-day of IEEE SSCS/CASS Thailand Special Lectures, Bangkok, Thailand, 9 Jan. 2023.
[16] R. B. Staszewski, “Digital RF: Discrete-time RX, Digital PA and ADPLL”, Seminar (1-hr) presented at Kasetsart University during a full-day of IEEE SSCS/CASS Thailand Special Lectures, Bangkok, Thailand, 9 Jan. 2023.
2022
[1] R. B. Staszewski, “All-Digital Phase-Locked Loops (ADPLL)”, Advanced Short Course (3 days, 18 hours total) presented at NXP Semiconductors, High-Tech Campus (HTC), Eindhoven, Netherlands, 7–9 Dec. 2022.
[2] R. B. Staszewski, “All-digital Phase-Locked Loops (ADPLL)”, IEEE SSCS short course (2 days, 12 hours total) at AGH Univer- sity of Science and Technology, Krakow, Poland, 27–28 Oct. 2022. [IEEE vTools link]
[3] R. B. Staszewski, “Quantum Computing in Nanoscale CMOS”, Seminar (1.5-hr) presented at Applied Physics Department, The Hebrew University of Jerusalem, Jerusalem, Israel, 26 Oct. 2022.
[4] R. B. Staszewski, “All-Digital Phase-Locked Loops (ADPLL)”, Short course (3 days, 18 hours total) presented at Israel In- stitute of Technology (Technion), Advanced Circuits Research Center (ACRC), (1 academic point for students), Haifa, Israel, 19–23 Oct. 2022. [Website link]
[5] R. B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, Industry seminar (1.5-hr) pre- sented at Ericsson worldwide, 28 Sept. 2022. (Virtual)
[6] R. B. Staszewski, “Time-domain Paradigm of Analog and RF Design using Advanced CMOS Technology”, Industry seminar (1.5-hr) presented at TSMC worldwide, 20 Sept. 2022. (Virtual)
[7] R. B. Staszewski, “Quantum Computing in Nanoscale CMOS”, Seminar (1-hr) presented at Center for Atomically Precise Fabrication of Solid-State Quantum Devices, University of Texas at Dallas, Richardson, TX, USA, 24 Jun. 2022. [Website link]
[8] R. B. Staszewski, Panel PL2 “This is the Right Way to Architect the Microwave Control for Quantum Computers!”, presentation and discussion (1.5-hr) at IEEE International Microwave Symposium (IMS), organized by M. Gouker and V. Issakov, Denver, CO, USA, 21 Jun. 2022. [Panel link]
[9] R. B. Staszewski, Student Entrepreneurship Forum (50-min), organized by V. Issakov – presentation and discussion at IEEE Radio-Frequency Integrated Circuits (RFIC) symposium, Denver, CO, USA, 21 Jun. 2022. [Forum link]
[10] R. B. Staszewski (replacing A. Niknejad), Panel PL1 “Industry vs. Academia: Who is Leading Whom?” presentation and discussion (1.5-hr) at IEEE International Microwave Symposium (IMS), organized by H. Hashemi and O. Eliezer, Denver, CO, USA, 20 Jun. 2022. [Panel link]
[11] R. B. Staszewski, Imran Bashir, and Elena Blokhina, “Towards Millions of Qubits in a Quantum SoC”, Workshop (8-hr), WSF-8, “Emerging Low-Temperature/Cryogenic Microwave Techniques and Technologies for Quantum Information Processing”, organized by A. Boaventura and M. Hamilton –(60-min) presented at IEEE Radio-Frequency Integrated Circuits (RFIC) symposium,Denver, CO, USA, 19 Jun. 2022. [Workshop link]
[12] R. B. Staszewski, Panel “Can Quantum Computing Solve Real World Problems?”, presentation and discussion (1.5-hr) at IEEE Custom Integrated Circuits Conf. (CICC), 27 Apr. 2022. (Virtual due to COVID-19) [Panels link]
[13] R. B. Staszewski, “Quantum Computing in Nanoscale CMOS”, IEEE SSCS lectures (60-min lecture) at AGH University of Science and Technology, Krakow, Poland, 6 Apr. 2022 (virtual).
[14] Elena Blokhina and R. B. Staszewski, “Engineering Skills That Will Advance Quantum Computing”, Keynote (45-min), 16.1 “Young People Program”, organized by S. Vinco and A. Klotz –(45-min) presented at IEEE DATE 2022 – Design, Automation and Test in Europe Conference, Antwerp, Belgium, 21 Mar. 2022. (virtual) [DATE-2022 link]
[15] R. B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, Industry seminar (1.5-hr) pre- sented at NXP worldwide, 8 Mar. 2022. (Virtual)
2021
[1] R. Nikandish and R. B. Staszewski, “CMOS Quantum Computing”, Tutorial (40-min) broadcasted via YouTube – presented at “2021 IEEE CASS Forum on Interdisciplinary Research, Shanghai, China, 14 Nov. 2021. [Web link] [YouTube link] (starts at 6:34:45, 6:57:55) [YouTube link]
[2] E. Blokhina, P. Giounanlis and R. B. Staszewski, “Quantum Computing in Nanoscale CMOS using Position-Based Charge Qubits”, Keynote speech (0.5-hr) presented at “2021 IEEE 14th International Conference on ASIC (ASICON)”, Kunming, China, 28 Oct. 2021. [Web Keynote link]
[3] R. Nikandish and R. B. Staszewski, “Quantum Computing in Nanoscale CMOS using Position-Based Charge Qubits”, Tutorial (1.5-hr) broadcasted via YouTube, organized by M. A. Pavanello-presented at “Chip in the Fields”, SBMicro/IEEE EDS Brazil Mini-colloquium, Campinas, SP, Brazil, 23 Aug. 2021. [Web program link] [YouTube link]
[4] R. Nikandish and R. B. Staszewski, “Quantum Computer CMOS System-on-Chip”, Monthly Webinar (1.5-hr), organized by F. Tavernier – presented at IEEE Solid-State Circuits Society (SSCS), 20 July 2021. [Webinar link] [Slides link] [Webinar Center link][YouTube Link]
[5] R. B. Staszewski, Elena Blokhina, Panagiotis Giounanlis, Imran Bashir, Mike Asker, Alireza Esmailiyan, Hongying Wang, Andrii Sokolov, Teerachot Siriburanon, and Dirk Leipold, “Quantum Computer on a Chip”, Workshop (7-hr), WSE-8, “Cryogenic Electronics for Quantum Computing and Beyond: Applications, Devices, and Circuits”, organized by F. Sebastiano and J. Bardin – (45-min) presented at IEEE Radio-Frequency Integrated Circuits (RFIC) symposium, Atlanta, Georgia, USA, 25 June 2021. (virtual) [Workshop link]
[6] R. B. Staszewski, “ES1-3: Quantum Computing in Nanoscale CMOS Using Position-Based Charge Qubits”, Workshop (1.5-hr) presented at Educational Session 1: Quantum Computing Circuit and System (Chairs: SungWon Chung & Jongseok Park) at IEEE CICC Conf. (CICC), ses. ES1-1, 25 Apr. 2021. (Virtual due to COVID-19) [Workshop link]
[7] R. B. Staszewski, Panel “SE3: Favorite Circuit Design and Testing Mistakes of Starting Engineers”, presentation and discussion (1-hr) at IEEE Solid-State Circuits Conf. (ISSCC), Moderator: Ramesh Harjani, San Francisco, California, USA, 19 Feb. 2021. (online)
[8] R. B. Staszewski, “Building a Quantum Computer: A Personal Journey”, Seminar (1-hr) presented at Technikum Programistyczne Infotech, Bialystok, Poland, 4 Feb. 2021. (online) [Presentation link]
[9] R. B. Staszewski, “TH2E-1 (Invited Paper) Towards a Quantum Computer on a Chip”, Invited Talk (30-min) presented at IEEE SiRF, Radio & Wireless Week, San Diego, CA, USA (online), 21 Jan. 2021. [Conference link]
2020
[1] R. B. Staszewski, “Quantum Computer on a CMOS Chip”, Keynote (30-hr) presented at MIDAS Ireland Annual Conference, Ireland (online), 19 Nov. 2020. [Workshop link (@1hr17min)] [YouTube link (@1hr49min20sec)]
[2] R. B. Staszewski, “Quantum Computer on a CMOS Chip”, Keynote (1-hr) presented at 14th IEEE Dallas Circuits and Systems Conference (DCAS), Richardson, Texas, USA (online), 16 Nov. 2020. [Workshop link]
[3] S. Binsfeld-Ferreira and R. B. Staszewski, “Design of Ultra-Low-Power Discrete-time Receivers for the Internet of Things”, Mini- tutorial (2-hrs), MT-3b, presented at International Symposium on Circuits and Systems (ISCAS), Spain, 18 Oct. 2020. (Virtual due to COVID-19) [Workshop link]
[4] R. B. Staszewski, Y. Hu, and T. Siriburanon, “Digital PLLs for Millimeter Wave – A Tutorial”, Workshop (1.5-hr) presentated at Virtual Educational Workshop 4: New 5G integration solutions, and related technologies (Chairs: N. Collaert and S. G. An- dersson) at IEEE European Solid-State Circuits Conference (ESSCIRC), Grenoble, France, 14–18 Sept. 2020. (Virtual due to COVID-19) [Conference link]
[5] R. B. Staszewski, “Quantum Computer on a CMOS Chip”, Webinar (1.5-hr) presented at Israel Institute of Technology (Tech- nion), Advanced Circuits Research Center (ACRC), Haifa, Israel, 14 May 2020. [Webinar link]
[6] R. B. Staszewski, “Beyond All-Digital PLL for RF and Millimeter-Wave Frequency Synthesis”, Workshop presentation (1.5-hr) at Educational Session 2: Phase-Locked Loops (Chair: Woogeun Rhee) at IEEE CICC Conf. (CICC), ses. ES2-1, Boston, MA, USA, 22 Mar. 2020. (Virtual due to COVID-19)
[7] R. B. Staszewski, “Quantum Computer on a Chip”, IEEE SSCS lectures (90-min lecture) at AGH University of Science and Technology, Krakow, Poland, 10 Mar. 2020. [IEEE vTools link]
[8] R. B. Staszewski, “Deep-Subthreshold Operation of ADPLLs, Transmitters and ADCs”, Seminar (1-hr) presented at Circuits and Systems Society (CASS-SCV) of the IEEE Santa Clara Valley Section, as part of a CASS-SCV Multi-Speaker Event “Advanced Frequency Synthesis for Digitally Intensive Transmitters for IoT and Mm-Wave Radios”, Santa Clara, CA 95051, USA, 20 Feb. 2020. [IEEE vTools link][Eventbrite link] [IEEE TV link]
[9] R. B. Staszewski, “Quantum Computer on a Chip”, Seminar (2-hr) presented at Stanford SLAC National Laboratory, Stanford, CA, USA, 21 Feb. 2020.
[10] R. B. Staszewski, “Quantum Computer on a Chip”, Seminar (2-hr) presented at Brookhaven National Laboratory, Long Island, NY, USA, 14 Feb. 2020.
[11] R. B. Staszewski, “Time-Domain RF and Analog Signal Processing”, Seminar (2-hr) presented at Brookhaven National Laboratory,Long Island, NY, USA, 14 Feb. 2020.
2019
[1] R. B. Staszewski, “Discrete-Time Receivers and ADC for the Internet-of-Things”, IEEE SSCS lectures (90-min lecture) at AGH University of Science and Technology, Krakow, Poland, 3 Dec. 2019.
[2] R. B. Staszewski, “Quantum Computer on a Chip”, Seminar (1-hr) presented at Analog Devices, Limerick, Ireland, 29 Jul. 2019.
[3] R. B. Staszewski, “Quantum Computer on a Chip” , Seminar (1-hr) presented Delft University of Technology ((TU Delft), EWI/EEMCS Lecture Hall, Delft, Netherlands, 25 Jun. 2019.
[4] D. Leipold, H. Leipold, L. Leipold, E. Blokhina, P. Giounanlis, K. Pomorski, R. Staszewski, I. Bashir, G. Maxim, M. Asker, C. Cetintepe, A. Esmailian, H. Wang, and T. Siriburanon, “Fully integrated quantum computing SOC in 22nm FD-SOI”, Seminar (1-hr) presented at Fermilab, Chicago, IL, USA, 19 Jun. 2019.
[5] R. B. Staszewski, “All-Digital PLL Architecture and Implementation; Digitally Controlled Oscillator (DCO) Time-to Digital Converter (TDC)” , MEAD Microelectronics 3 classes (6-hrs) on “PLLs and Oscillators”, presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 19 June 2019. [link]
[6] R. B. Staszewski, “Quantum Computer on a Chip” , Seminar (1-hr) presented to IEEE Circuits and Systems Society, Dallas Chapter, Richardson, TX, USA, 6 Jun. 2019. [IEEE vTools link]
[7] R. B. Staszewski, “Millimeter-Wave RF Circuits in Nanoscale CMOS” , Seminar (1-hr) presented at University of Texas at Dallas; co-organized by Texas Analog Center of Excellence (TxACE), Richardson, TX, USA, 6 Jun. 2019.
[8] R. B. Staszewski, “Quantum Computer on a Chip” , Presentation (20-mins) at UCD/IBM Quantum Technologies Colloquium, University College Dublin, Dublin, Ireland, 28 Mar. 2019. [Link]
[9] R. B. Staszewski, Lecture on, “Research Activities at University College Dublin”, IEEE SSCS lectures (90-min lecture) at AGH University of Science and Technology, Krakow, Poland, 21 Mar. 2019. [IEEE vTools link]
[10] R. B. Staszewski, “Quantum Computer on a Chip” , Seminar (1-hr) organized at Krakow Quantum Informatics Seminar by AGH University of Technology and IBM Software Lab Krakow, Krakow, Poland, 30 Jan. 2019. [Link] [IEEE vTools link]
[11] R. B. Staszewski, “Quantum Computer on a Chip” , Presentation (30-mins) at 2nd All Ireland Conference on Quantum Technologies, Maynooth, Ireland, 21 Jan. 2019.
2018
[1] R. B. Staszewski, Lecture on “Time-to-Digital Converter (TDC)” IEEE SSCS lectures (90-min lectures) at AGH University of Science and Technology, Krakow, Poland, 20 Dec. 2018.
[2] R. B. Staszewski, Lecture on “Digitally-Controlled Oscillator (DCO)” IEEE SSCS lectures (6x90-min lectures) at AGH University of Science and Technology, Krakow, Poland, 15 Nov. 2018.
[3] R. B. Staszewski, Lecture on “All-digital Phase-Locked Loops (ADPLL)” IEEE SSCS lectures (6x90-min lectures) at AGH University of Science and Technology, Krakow, Poland, 18 Oct. 2018. [IEEE vTools link]
[4] R. B. Staszewski, “Discrete-Time Approach to Push High-Performance in Receivers”, Workshop WS11 “Highly Integrated RF Transceiver Systems” – (1-hr) presented at IEEE European Microwave Conference (EuMC), Madrid, Spain, 23 Sept. 2018. [Workshop keynotes link
[5] R. B. Staszewski, “It is Time to use Time (for Digital RF Clock Generation and Time-of-Flight)”, Keynote speech (45 min) presented at the Topical Workshop on Electronics for Particle Physics(TWEPP), KU Leuven - Campus Carolus, Antwerp, Belgium, 19 Sept. 2018. [Workshop link] [Workshop keynotes link]
[6] R. B. Staszewski, “Time-Domain Paradigm of RF Design”, Keynote speech (1-hr) presented at the (ICSES), AGH University of Science and Technology, Krakow, Poland, 11 Sept. 2018. [Conference keynotes link]
[7] R. B. Staszewski, “All-Digital Phase-Locked Loops – Personal Journey and Latest Innovations” Seminar (4-hr) presented at Tokyo Institute of Technology, Okada Lab, Tokyo, Japan, 14 July 2018.
[8] R. B. Staszewski, “All-Digital PLL Architecture and Implementation; Digitally Controlled Oscillator (DCO); Time-to Digital Converter (TDC)”, MEAD Microelectronics 3 classes (6-hrs) on “PLLs and Oscillators”, presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 27 June 2018. [IEEE Xplore link]
[9] R. B. Staszewski, I. Madadi, and M. Tohidian, “Discrete-Time Approach to Push High-Performance in Receivers”, Workshop WSH “High-Performance WLAN Transceiver Design and Calibration Techniques” (1-hr) presented at IEEE Radio-Frequency Integrated Circuits conference (RFIC), Philadelphia, Pennsylvania, USA, 10 June 2018. [Workshop link]
[10]R. B. Staszewski, “Towards a Practically Realizable CMOS Quantum Computer”, Seminar (1.5-hr) organized by IEEE SSCS at AGH University of Technology, Krakow, Poland, 16 Mar. 2018. [AGH link]
2017
[1] B. Staszewski, “Design of Discrete-Time Receivers for the Internet-of-Things”, Seminar (1.5-hrs) sponsored by IEEE SSCS at AGH University of Technology, Krakow, Poland, 18 Dec. 2017. [IEEE vTools link]
[2] B. Staszewski, “Patents: The Good, the Bad and the Ugly – A perspective from an industrial inventor turned academic”, Seminar (1-hrs) at AGH University of Technology, Krakow, Poland, 17 Nov. 2017. [IEEE vTools link]
[3] B. Staszewski, “Mixed-Signal Electronics to Enable Internet-of-Things”, Seminar (2-hrs) sponsored by IEEE SSCS at AGH University of Technology, Krakow, Poland, 4 Oct. 2017. [IEEE vTools link]
[4] S. Binsfeld Ferreira and B. Staszewski, “Design of Discrete-Time Receivers for the Internet of Things”, Seminar (2-hrs) presented at 30th Symposium on Integrated Circuits and System Design(SBCCI), Fortaleza, Ceara, Brazil, 28 Aug. 2017.
[5] B. Staszewski, Short Course on “All-Digital Phase-Locked Loops (ADPLL)” and “Ultra-Low Power and Ultra-Low Voltage Wireless Transceivers for IoT”, Lectures sponsored by IEEE CAS & SSCS (6-hrs) at University of Macau, Macau SAR, China, 27 July 2017.
[6] B. Staszewski, “It is Time to use Time (for Digital RF Clock Generation)”, Seminar (3-hrs) sponsored by IEEE SSCS, Kasetsart University, Bangkok, Thailand, 25 July 2017.
[7] B. Staszewski, “All-Digital PLL Architecture and Implementation; Digitally Controlled Oscillator (DCO) Time-to-Digital Converter (TDC);” MEAD Microelectronics 3 classes (6-hrs) on “PLLs and Oscillators”, presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 28 June 2017. [IEEE Xplore link]
[8] B. Staszewski, “It is Time to use Time (for Digital RF Clock Generation)”, Seminar (1-hrs) sponsored by IEEE SSCS, Nankai University, Tianjin, China, 14 June 2017.
[9] B. Staszewski, M. Babaie, S. Binsfeld Ferreira, and F.-W. Kuo, “Frequency Synthesis and RF using Advanced CMOS for Internetof-Things”, Seminar (20-min) presented at Conference on Emerging Technologies (ETCMOS), Hotel Sofitel Victoria, Warsaw, Poland, 29 May 2017. [Conference link]
[10] M. Babaie, S. Binsfeld Ferreira, F.-W. Kuo, and B. Staszewski, “A 4.4mW-TX, 3.6mW-RX Fully Integrated Bluetooth Low-Energy Transceiver for IoT Applications”, Seminar (45-min) presented at 26th Workshop on Advances in Analog Circuit Design (AACD), Eindhoven, Netherlands, 30 Mar. 2017. [Workshop link]
[11] R. B. Staszewski, “Recent advancements in ultra-low power RF circuits and Wave-shaping in RF oscillators”, Invited lecture (2-hrs) presented at IEEE Circuits and Systems 2-day Workshop on microelectronics and its applications, Almo Collegio Borromeo, Pavia, Italy, 20 Mar. 2017. [Workshop link]
2016
[1] R. B. Staszewski, Advanced Short Course on “All-digital Phase-Locked Loops (ADPLL)”, IEEE SSCS lectures (2 days, 6x90-min lectures) at AGH University of Science and Technology, Krakow, Poland, 8–9 Dec. 2016. [IEEE vTools link]
[2] R. B. Staszewski, “Ultra-Low Power and Ultra-Low Voltage Wireless Transceivers for IoT”, Workshop WW02 “Trends in CMOS RF ICs” (1-hr) presented at IEEE European Microwave Conference (EuMIC), London, UK, 05 Oct. 2016.
[3] R. B. Staszewski, “Digital Frequency Synthesis: Journey towards Spectral Purity, Ultra-Low Power and Millimeter-Wave Operation” Lecture sponsored by IEEE SSCS (1-hr) at Peking University, Shenzhen Graduate School, Shenzhen, Guandong, China, 29 July 2016. DOI: 10.1109/MSSC.2016.2623040. [IEEE Xplore link]
[4] R. B. Staszewski, Advanced Short Course on “All-digital Phase-Locked Loops (ADPLL)”, International Summer School (4 days, 20x45-min lectures) at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 19–22 July 2016. [IEEE Xplore link]
[5] R. B. Staszewski, “All-Digital PLL Architecture and Implementation; Digitally Controlled Oscillator (DCO); Time-to-Digital Converter (TDC);” MEAD Microelectronics 3 classes (4.5-hr) on “Practical PLL Design for Frequency Syn-thesis and Clocking”, presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 22–23 June 2016.
[6] R. B. Staszewski, “It is Time to use Time (for Digital RF Clock Generation)”, Keynote speech (1-hr) presented at the Second IEEE International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP), AGH University of Science and Technology, Krakow, Poland, 15 June 2016. [Conference keynotes link]
[7] R. B. Staszewski, “Patents? The Good, the Bad and the Ugly”, Panel presentation and discussion (1-hr) at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2016), San Francisco, California, USA, 24 May 2016.
[8] R. B. Staszewski, “Designing RF Frequency Synthesizers Robust to Interference”, Tutorial (45-min) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Workshop WSG: “Frequency synthesizers of multi-band, multi-standard radios and Internet of Things (IoT)”, San Francisco, California, USA, 22 May 2016.
[9] R. B. Staszewski, “New Time-Domain Paradigm of RF Design: Personal Journey”, Seminar (1-hr) presented at Confucius Institute at University College Dublin (UCD), Dublin, Ireland, 25 Feb. 2016.
[10] R. B. Staszewski, “Eureka! It is time to use time for RF”,Panel “ EP4: Eureka! The Best Moments of Solid-State Circuit Design in the 2000s”, presentation and discussion (2-hr) at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, California, USA, 2 Feb. 2016.
2015
[1] R. B. Staszewski, “All-digital PLL architecture and implementation for RF; Frequency Synthesizers in Nanometer CMOS; Time-to-digital converter (TDC);” MEAD Microelectronics 3 classes (4.5-hr) on “PLLs : Advanced Techniques” presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 25 June 2015.
[2] R. B. Staszewski, “Low Power RF Generation”, Tutorial (45-mins) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Workshop WMC: “Micro and Nanowatt Smart RF Transceiver ICs for Internet of Things”, Phoenix, Arizona, USA, 18 May 2015.
[3] R. B. Staszewski, “Switched-Mode PA for Broadband and RF-DACs”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Workshop WSE: “Mixed-Signal Power Amplifiers and RF-DACs”, Phoenix, Arizona, USA, 17 May 2015.
[4] L. de Vreede, M. Alavi, and R. B. Staszewski, “Next Generation Basestation Transmitters/RFDACs”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC), Workshop WSE: “Mixed-Signal Power Amplifiers and RF-DACs”, Phoenix, Arizona, USA, 17 May 2015.
2014
[1] R. B. Staszewski, “Digital Frequency Synthesis: Journey towards Spectral Purity, Ultra-Low Power and Millimeter-Wave Operation”, Web seminar (“webinar”) (88 mins) by IEEE SSCS, first broadcasted on 8 Aug. 2014. (available at http://resourcecenter.sscs.ieee.org/sscs/product/webinars/SSCSWEB0020)
[2] R. B. Staszewski, “Digital Frequency Synthesis: Journey towards Spectral Purity, Ultra-Low Power and Millimeter-Wave Operation”, Seminar (1.5-hr) presented at KU Leuven for IEEE SSCS Benelux Section, Leuven, Belgium, 8 Aug. 2014.
[3] R. B. Staszewski, “All-digital PLL architecture and implementation for RF; Frequency Synthesizers in Nanometer CMOS; Time-to-digital converter (TDC)”; Summer school (5-hr) presentation at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 11 July 2014.
[4] R. B. Staszewski, “Mixed-Signal Electronics to Enable Internet-of-Things”, Seminar (1-hr) presented at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 9 July 2014.
[5] R. B. Staszewski, “All-digital PLL architecture and implementation for RF; Frequency Synthesizers in Nanometer CMOS; Time-to-digital converter (TDC);” MEAD Microelectronics 3 classes (4.5-hr) on “PLLs : Advanced Techniques” presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 26 June 2014.
[6] R. B. Staszewski, M. Alavi, and L. de Vreede, “Power RF-DACs Replacing RF Power Amplifiers”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2014), Workshop WSJ: “Silicon and GaN PA for RF and mmW applications”, Tampa, Florida, USA, 1 June 2014.
[7] R. B. Staszewski, “Time-domain analog and RF signal processing for reconfigurable transceivers”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2014), Workshop WSJ: “Reconfigurable Radio-Frequency Transceivers”, Tampa, Florida, USA, 1 June 2014.
[8] R. B. Staszewski, W. Wu, and J. R. Long, “All-digital PLL design for mm-wave FMCW radars”, Tutorial (40-mins) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2014), Workshop WSK: “Frequency synthesis for 60-GHz and beyond: architectures and building blocks”, Tampa, Florida, USA, 1 June 2014.
[9] W.Wu, and B. Staszewski, “Time-Domain Techniques for mm-Wave Frequency Generation”, Seminar (1-hr) presented at 23rd Workshop on Advances in Analog Circuit Design (AACD) in Instituto Superior Tecnico, Lisbon, Portugal, 10 Apr. 2014.
2013
[1] R. B. Staszewski, “Recent Developments in Time-Domain Analog and RF Signal Processing”, Seminar (1.5-hr) presented at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 29 Oct. 2013.
[2] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at MCCI Research Forum at Tyndall National Institute, Cork, Ireland, 17 Oct. 2013.
[3] R. B. Staszewski, “Introduction and Landscape of Advanced Frequency Synthesizers”, Tutorial (1-hr) presented at IEEE European Solid-State Circuits Conf. (ESSCIRC-2013), Bucharest, Romania, 16 Sept. 2013.
[4] R. B. Staszewski, “Pushing the Limits of Frequency Synthesizers to Ultra-Low Phase Noise, Spur-Free and mm-wave” Lecture (4-hrs) presented at International School on IC circuits and systems, University of Pavia, Pavia, Italy, 1 Jul. 2013.
[5] R. B. Staszewski, “All-digital PLL architecture and implementation for RF; Frequency Synthesizers in Nanometer CMOS; Time-to-digital converter (TDC)” MEAD Microelectronics 3 classes (4.5-hr) on “PLLs: Advanced Techniques” presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 24 June 2013.
[6] R. B. Staszewski, “From Software Radio-Frequency Transmitters to Highly-Reconfigurable mm-Wave Transmitters”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2013), Workshop WSM, Seattle, Washington, USA, 2 June 2013.
[7] R. B. Staszewski, “Pushing the limits of frequency synthesizers to ultra-low phase noise, spur-free and mm-wave”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2013), Workshop WSD, Seattle, Washington, USA, 2 June 2013.
[8] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at University College Cork (UCC) & Tyndall National Institute, Cork, Ireland, 10 Apr. 2013.
[9] R. B. Staszewski, “Time-Domain RF Signal Processing”, Seminar (1.5-hr) presented at Technische Universitát Dresden, G. Fettweis’ Vodafone Chair, Dresden, Germany, 1 Feb. 2013.
2012
[1] R. B. Staszewski, “Digital RF and Digitally-Assisted RF”, Seminar (4-hr) presented at Tokyo Institute of Technology, Matsuzawa Lab,Tokyo, Japan, 16 Nov. 2012.
[2] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at International Symposium on Advanced RF IC Design, organized by 165 Research Committee in Japan Society for the Promotion of Science and IEEE SSCS Kansai Chapter, University of Tokyo, Tokyo, Japan, 15 Nov. 2012.
[3] R. B. Staszewski, “Time-Domain RF Signal Processing”, Workshop (1-hr) presented at IEEE European Microwave Integrated Circuits Conference (EuMIC), Workshop WsSu1F on “Digital-RF and Digitally-Enhanced Transceiver Architectures”, Amsterdam, The Netherlands, 28 Oct. 2012.
[4] R. B. Staszewski, “Time-Domain RF Signal Processing”, Seminar (1-hr) presented at University College Cork (UCC) & Tyndall National Institute; sponsored by IEEE SCSS, UK & Republic of Ireland Chapter, Cork, Ireland, 21 Aug. 2012.
[5] R. B. Staszewski, “Digital RF and Digitally-Assisted RF”, Summer school (4- hr) presentation at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 7 July. 2012.
[6] R. B. Staszewski, “Digital RF and Digitally-Assisted RF”, Short course (12- hr) presentation at University of Electronic Science and Technology of China (UESTC) ,Chengdu, Sichuan, China, 5–6 July. 2012.
[7] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at University of Texas at Dallas; co-organized by Texas Analog Center of Excellence (TxACE), Richardson, TX, USA, 26 Jun. 2012.
[8] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at Texas Instruments, Kilby Labs, Dallas, TX, USA, 25 Jun. 2012.
[9] R. B. Staszewski, “RF scaling: Can it keep up with digital CMOS? Should it?”, Panel presentation and discussion (1-hr) at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2012), Montreal, Quebec, Canada, 19 June 2012.
[10] R. B. Staszewski, “Achieving Fast Locking and Wide Bandwidth Operation through All-digital PLL Techniques”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2012), Workshop WSF, Montreal, Quebec, Canada, 17 June 2012.
[11] R. B. Staszewski, “Recent Advances in Digital Polar and I/Q Transmitters”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2012), Workshop WSP, Montreal, Quebec, Canada, 17 June 2012.
[12] R. B. Staszewski, “Recent Advances and Future Directions in Digital RF and Digitally-Assisted RF”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits Symp. (RFIC-2012), Workshop WSI, Montreal, Quebec, Canada, 17 June 2012.
[13] R. B. Staszewski, “Digital RF”, Graduate-level for-credit class (14 x 2-hr lectures with projects and exams) at Delft University of Technology (TU Delft), Delft, the Netherlands, April-June 2012.
[14] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at University of Texas (UT) at Austin, Austin, TX, USA, 19 Apr. 2012.
[15] R. B. Staszewski, “Digital RF and Digitally-Assisted RF”, Short course presentation (6-hr) at IEEE Solid-State Circuits Society, Taiwan Chapter, National Chiao Tung University (NCTU), Hsinchu, Taiwan, 10 Apr. 2012. DOI: 10.1109/MSSC.2012.2202490. [IEEE Xplore link]
[16] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at University of Science and Technology of China (USTC), Hefei, China, 3 Apr. 2012.
[17] R. B. Staszewski, “Time-Domain Analog and RF Signal Processing”, Seminar (1-hr) presented at University of Electronic Science and Technology of China (UESTC), Chengdu, Sichuan, China, 1 Apr. 2012.
2011
[1] R. B. Staszewski, “Digital RF and digitally-assisted RF transceiver design”, Plenary talk (1-hr) presented at IEEE Symposium on Radio-Frequency Integration Technology (RFIT’11), Beijing, China, 1 Dec. 2011.
[2] R. B. Staszewski, “Digital RF Architectures for Wireless Transceivers”, Tutorial (3-hr) presented at IEEE Symposium on Radio-Frequency Integration Technology (RFIT’11), Beijing, China, 30 Nov. 2011. DOI: 10.1109/RFIT.2011.6141745. [IEEE Xplorelink]
[3] R. B. Staszewski, “Towards Radio Frequency (RF) Computer”, Distinguished Lecture presentation (1-hr) at IEEE Solid-State Circuits Society, Shanghai Chapter, Shanghai Jiao Tong University, Shanghai, China, 26 Nov. 2011
[4] R. B. Staszewski, “Towards Radio Frequency (RF) Computer”, Distinguished Lecture presentation (1-hr) at IEEE Solid-State Circuits Society, Shanghai Chapter, Fudan University, Shanghai, China, 23 Nov. 2011. DOI: 10.1109/RFIT.2011.6141745. [IEEE Xplore link]
[5] R. B. Staszewski, “The future of M2M”, Panel presentation and discussion (1-hr) at International Workshop on M2M Technology, National Taiwan University, Taipei, Taiwan, 1 Nov. 2011.
[6] R. B. Staszewski, “Digital RF”, Keynote speech (1-hr) presented at International Workshop on M2M Technology, National Taiwan University, Taipei, Taiwan, 31 Oct. 2011.
[7] R. B. Staszewski, “Digital RF Architectures for Wireless Transceivers”, Plenary talk (1-hr) presented at 20th IEEE European Conference on Circuit Theory and Design (ECCTD’11), Linkoping, Sweden, 30 Aug. 2011.
[8] R. B. Staszewski, “What is the limit of multi-radio integration ... or rather, is it disintegration?”, Panel organization, presentation and discussion (1-hr) at IEEE International Microwave Symp. (IMS-2011), Baltimore, MD, USA, 7 June 2011.
[9] R. B. Staszewski, “RF-BIST in the RF-SoC Environment”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSH, Baltimore, MD, USA, 5 June 2011.
[10] R. B. Staszewski, “Recent Advancements and Future Directions in Digital RF and Digitally-Assisted RF”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSD , Baltimore, MD, USA, 5 June 2011.
[11] R. B. Staszewski, “Recent Advancements and Future Directions in Digital RF and Digitally-Assisted RF”, Distinguished Lecture presentation (2-hr) at IEEE Solid-State Circuits Society, South Brazil Chapter, University of Sao Paulo, Brazil, 19 May 2011.
[12] R. B. Staszewski, “Digital RF Architectures and Digitally-Assisted RF”, Tutorial (1-hr) presented at IEEE International Symposium on Circuits and Systems (ISCAS), Tutorial session: Software defined and Cognitive Radios: The CMOS Way”, Rio de Janeiro, Brazil, 15 May 2011.
[13] R. B. Staszewski, “Digital RF”, Graduate-level for-credit class (14 x 2-hr lectures with projects and exams) at Delft University of Technology (TU Delft), Delft, the Netherlands, April-June 2011.
[14] R. B. Staszewski, “All-Digital RF Frequency Synthesis and Transmit Modulation”, Distinguished Lecture presentation (2-hr) at IEEE Solid-State Circuits Society, Taiwan Chapte, National Chiao Tung University, Hsinchu, Taiwan, 30 Mar. 2011. DOI: 10.1109/MSSC.2011.941604. [IEEE Xplore link]
[15] R. B. Staszewski, “Recent Advancements in Frequency Synthesis”, Short course (1.5-hr) presented at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 24 Feb. 2011. DOI: 10.1109/ISSCC.2011.5746197. [IEEE Xplore link]
2010
[1] R. B. Staszewski, “Fundamentals of Digitally-Assisted RF”, Tutorial (3.5-hr) presented at IMEC Auditorium. Part of IDESA - EC Framework 7 project, Leuven, Belgium, 22 Oct. 2010.
[2] R. B. Staszewski, “Recent Advancements and Future Directions in Digital RF and Digitally-Assisted RF”, Seminar (1-hr) presented at University of Texas at Dallas; co-organized by Texas Analog Center of Excellence (TXACE), Richardson, TX, USA, 14 Oct. 2010.
[3] R. B. Staszewski, “Digital RF Architectures and Digitally-Assisted RF”, Seminar (45-min) presented at FIRB Workshop, University of Pavia, Pavia, Italy, 28 Sept. 2010.
[4] R. B. Staszewski, “Digital RF Processing for Single-Chip Radios”, Workshop (1-hr) presented at IEEE European Microwave Week (EuMW), Workshop on Advances in filtering and sampling for integrated transceivers, Paris, France, 26 Sept. 2010.
[5] R. B. Staszewski, “All-Digital Frequency Synthesizer in Deep-Submicron CMOS”, Short Course (8-hr) presented at IEEE Santa Clara Valley Circuits and Systems Society, as part of a 2-day IEEE CAS Summer School on Emerging Frequency Synthesis Techniques for the Current and Future Advanced CMOS Technologies, Santa Clara, CA, USA, 15 Aug. 2010.
[6] R. B. Staszewski, “All-Digital Frequency Synthesizer in Deep-Submicron CMOS”, Short Course (4-hr) presented at IEEE Central Texas Solid State Circuit & Circuits and Systems Joint Chapter, as part of a 1-day IEEE CAS Summer School on Emerging Frequency Synthesis Techniques for the Current and Future Advanced CMOS Technologies, Austin, TX, USA, 12 Aug. 2010.
[7] R. B. Staszewski, “Digital RF”, Graduate-level for-credit class (14 x 2-hr lectures with projects and exams) at Delft University of Technology (TU Delft), Delft, the Netherlands, April-June 2010.
[8] R. B. Staszewski, “Advances in Digital RF Architectures and Digitally-Assisted RF”, IEEE Expert Now online course (1-hr), ISBN: 978-1-4244-6186-8, 2010. ISBN: 978-1-4244-6186-8. [IEEE Xplore link]
[9] R. B. Staszewski, “Discrete-time Receiver”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSB, Anaheim, CA, USA, 23 May 2010.
[10] R. B. Staszewski, “Advances in Digital RF Architectures”, Tutorial (50-min) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSJ, Anaheim, CA, USA, 23 May 2010.
[11] R. B. Staszewski, “Digital RF Architectures and Digitally-Assisted RF”, Seminar (1.5-hr) presented at Shanghai Jiao Tong University, Shanghai, China, 17 Apr. 2010.
[12] R. B. Staszewski, “Digital RF Architectures and Digitally-Assisted RF”, Distinguished Lecture presentation (1-hr) at IEEE Solid-State Circuits Society, Shanghai Chapter, Fudan University, Shanghai, China, 16 Apr. 2010.
[13] R. B. Staszewski, “Advances in Digital RF Architectures: 65-nm RF-SoC and RF-BIST”, Seminar (1.5-hr) presented to IEEE Solid-State Circuits Society, Taipei Chapter, National Taiwan University, Taipei, Taiwan, 4 Mar. 2010.
[14] R. B. Staszewski, “Can RF SoCs (Self)Test Their Own RF? and A 0.8 mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC”, Seminar (2-hr) presented at University of Texas at Dallas; co-organized by Texas Analog Center of Excellence (TxACE), Richardson, TX, USA, 16 Feb. 2010.
[15] R. B. Staszewski, “RF SoC™ can test their own RF, Presentation (20-min) at the Can RF SoCs (Self)Test Their Own RF?” Evening Session ES5 at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 9 Feb. 2010.
2009
[1] R. B. Staszewski, “A Return to the Classic Heterodyne Architecture for Integrated Transceivers?”, Panel presentation and discussion (1:10-hr) at IEEE International Microwave Symp. (IMS-2009), Boston, MA, USA, 11 June 2009.
[2] R. B. Staszewski, “Trends for Highly Integrated Multi-Mode Transceiver Architectures in Nanoscale CMOS”, Tutorial (50-min) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WWA, Boston, MA, USA, 10 June 2009.
[3] R. B. Staszewski, “Advances in Digital RF Architectures”, Tutorial (50-min) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSG, Boston, MA, USA, 7 June 2009.
[4] R. B. Staszewski, “Digitally-Assisted RF”, Seminar (1-hr) presented at University of California at Berkeley, Berkeley, CA, USA, 1 Apr. 2009.
[5] R. B. Staszewski, “Towards Radio Computer”, Seminar (1-hr) presented at Columbia University, New York, NY, USA, 23 Mar. 2009.
[6] R. B. Staszewski, “Digitally-Assisted RF”, Seminar (1-hr) presented at TU Delft, Delft, The Netherlands, 23 Feb. 2009.
[7] R. B. Staszewski, “Digitally-Assisted RF”, Seminar (1-hr) presented at KU Leuven, Leuven, Belgium, 23 Feb. 2009.
[8] R. B. Staszewski, “Digitally-Assisted RF”, Seminar (1-hr) presented at IMEC, Leuven, Belgium, 20 Feb. 2009.
[9] R. B. Staszewski, “Architecture Trends and Requirements of RF PLLs for Wireless”, Presentation (1-hr) at the Clock Synthesis Design Forum (F7) at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 12 Feb. 2009.
[10] R. B. Staszewski, “Fundamentals of Digitally-Assisted RF”, Tutorial (1.5-hr, twice) presented at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 8 Feb. 2009.
2008
[1] R. B. Staszewski, B. Krenik, “Digital RF Processor (DRP™) Technology to the Rescue: Why RF Can’t Exist without Digital Assistance Anymore?”, Seminar (1-hr) presented at International Symposium on Digitally Assisted Analog and RF Circuit Design, organized by Tokyo Institute of Technology and 165 Research Committee in Japan Society for the promotion of Science, (Presented by B. Krenik), Tokyo, Japan, 6 Nov. 2008.
[2] R. B. Staszewski, B. Krenik, “Digital RF Processor (DRP™) Technology to the Rescue: Why RF Can’t Exist without Digital Assistance Anymore?”, Panel presentation and discussion (2-hr) at IEEE Asian Solid-State Circuits Conference (A-SSCC), (Presented by B. Krenik), Fukuoka, Japan, 4 Nov. 2008.
[3] R. B. Staszewski, “Digital RF Processor (DRP™) for Single-Chip Mobile Radios: All-Digital PLL, Transmitter and Discrete-Time Receiver”, Short course (5-hr) presented to IEEE Solid-State Circuits Society, Hsinchu Chapter, National Taiwan University, Taipei, Taiwan, 21 Aug. 2008.
[4] R. B. Staszewski, “Digital RF Processor (DRP™) for Single-Chip Mobile Radios: All-Digital PLL, Transmitter and Discrete-Time Receiver”, Short course (5-hr) presented to IEEE Solid-State Circuits Society, Taipei Chapter, National Chiao Tung University, Hsinchu, Taiwan, 20 Aug. 2008.
[5] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, MEAD Microelectronics class (3-hr) on Analog and RF Design in Nanoscale CMOS presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 4 Jul. 2008.
[6] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, MEAD Microelectronics class (3-hr) on PLLs and Clock Recovery presented at Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland, 3 Jul. 2008.
[7] R. B. Staszewski, “Low-power Receivers Concepts: an Industrial Example”, Tutorial (45-min) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSI, Atlanta, GA, USA, 15 June 2008.
[8] R. B. Staszewski, “Digitally-assisted RF Frequency Synthesizers”, Presentation (1-hr) at the Digitally-Assisted Analog & RF Circuits Forum at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 7 Feb. 2008.
[9] B. Haroun, R. B. Staszewski, and K. Nagaraj, “Time-to-digital Converters: Opportunities in Nanometer CMOS”, Presentation (30-min) at the Unusual Data-Converter Techniques Evening Session ES4 at IEEE Solid-State Circuits Conf. (ISSCC), (presented by B. Haroun), San Francisco, CA, USA, 4 Feb. 2008.
[10] R. B. Staszewski, “Digital RF Processor (DRP™) for Single-Chip Radios”, Seminar (3-hr) presented to IEEE Circuits and Systems Society, Thailand Chapter, Bangkok, Thailand, 7 Jan. 2008.
2007
[1] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, MEAD Microelectronics class (3-hr) on PLLs and Clock Recovery presented at Hilton San Diego Resort, San Diego, CA, USA, 14 Nov. 2007.
[2] R. B. Staszewski, “Digital RF Processor (DRP™): System-on-Chip Solutions for Mobile Devices”, Seminar (1-hr) presented at University of California at Los Angeles, Los Angeles, CA, USA, 13 Nov. 2007.
[3] D. Leipold and R. B. Staszewski, “Digital RF Processing for Single-Chip Radios”, Workshop (1-hr) presented at IEEE European Microwave Week (EuMW), Workshop on Advanced Techniques for Multi-Mode/Multi-Band RF Transceivers for Wireless Communications, (Presented by D. Leipold), Munich, Germany, 10 Oct. 2007.
[4] R. B. Staszewski, “Digital RF Processor (DRP™) for Single-Chip Radios”, Seminar (1-hr) presented to IEEE Microwave Theory and Techniques Society, Dallas Chapter, Richardson, TX, USA, 25 Sept. 2007.
[5] R. B. Staszewski (for B. Krenik), “Are Analog Designers Hopeless at Scaling? Will Digital Designers Eat Their Lunch at 45nm and Below?”, Panel presentation and discussion (1.5-hr) at IEEE CICC Conf. (CICC-2007), ses. 10, San Jose, CA, USA, 17 Sept. 2007.
[6] R. B. Staszewski and K. Waheed, “Top-Down Design of RF Transceivers Using VHDL”, Tutorial (1.5-hr) presented at IEEE CICC Conf. (CICC-2007), Educational Session 1: Mixed-Signal SOC Design Methodology, San Jose, CA, USA, 16 Sept. 2007.
[7] R. B. Staszewski, “Digital RF Processor (DRP™) for Single-Chip Radios”, Talk (30-min) presented at Massachusetts Institute of Technology, Center for Circuits, System, Software, for the Workshop on Scaled Analog Circuit Design at the Interfaces, Cambridge, MA, USA, 26 June 2007.
[8] O. Eliezer and R. B. Staszewski, “Digital RF Processor (DRP™) for Wireless Transmitters”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSB, Honolulu, HI, USA, 3 June 2007.
[9] R. B. Staszewski, “Digital RF Processor (DRP™): Industrial Software Defined Radio Example”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSL, Honolulu, HI, USA, 3 June 2007.
[10] R. B. Staszewski, “Device Variability of Nanoscale RF CMOS Circuits and its System Mitigation”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSD, Honolulu, HI, USA, 3 June 2007.
[11] R. B. Staszewski, “Digital RF Processor (DRP™): All-Digital TX and Discrete-Time RX”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop TSA, Honolulu, HI, USA, 3 June 2007.
[12] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, Seminar (1-hr) presented at University of Texas at Austin, Austin, TX, USA, 16 Mar. 2007.
[13] R. B. Staszewski, ““DRP™ – Digital RF Processing: System-On-Chip Solutions for Mobile Devices”, Seminar (1-hr) presented at Chinese Instutute of Engineers (CIE), D/FW Section, Dallas, TX, USA, 10 Mar. 2007.
[14] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, Seminar (1-hr) presented to IEEE Circuits and Systems Society, Dallas Chapter, Dallas, TX, USA, 21 Feb. 2007.
[15] R. B. Staszewski, “Frequency Synthesizers in Nanometer CMOS”, Short course (1.5-hr, twice) presented at IEEE Solid-State Circuits Conf. (ISSCC), San Francisco, CA, USA, 15 Feb. 2007.
[16] R. B. Staszewski, “Winning Recipe: Digital Turns RF and RF Turns Digital”, Presentation and discussion (1.5-hr) at IEEE Solid-State Circuits Conf. (ISSCC) panel “Digital RF - Fundamentally a New Technology or Just Marketing Hype?”, San Francisco, CA, USA, 13 Feb. 2007. [Outstanding Panel Award]
2006
[1] R. B. Staszewski, “Digital RF Processor (DRP™): All-Digital TX and Discrete-Time RX”, Short course (3-hr) presented at IEEE Asia Pacific Microwave Conference (APMC-2006), Yokohama, Japan, 12 Dec. 2006.
[2] R. B. Staszewski, “DRP™ - Digital RF Processing: System-on-chip Solutions for Mobile Devices”, Seminar (1-hr) presented at Tokyo Institute of Technology, Matsuzawa Lab, Tokyo, Japan, 11 Dec. 2006.
[3] R. B. Staszewski, S. Rezeq, “Digital RF Processor (DRP™): All-Digital TX and Discrete-Time RX”, Seminar (1-hr) presented at Southern Methodist University, Dallas, TX, USA, 3 Oct. 2006.
[4] R. B. Staszewski, “All-Digital RF Frequency Synthesizer and Transmitter for Cellular Phones”, IEEE short course (3-hr) presentation at the Institute of Microelectronics (IME), Science Park II, Singapore, 9 Sept. 2006.
[5] R. B. Staszewski, “DRP™ Digital RF Processing: System-On-Chip Solutions for Mobile Devices”, Talk (1-hr) given at the Institute of Microelectronics (IME), Science Park II, Singapore, 8 Sept. 2006.
[6] R. B. Staszewski, “All-Digital Frequency Synthesizer Based TX and Direct Sampling RX for Mobile Phones”, Tutorial (1-hr) presented at IEEE Radio Frequency Integrated Circuits (RFIC) Symp. Workshop WSJ, San Francisco, CA, USA, 11 Jun. 2006.
[7] R. B. Staszewski, “All-Digital RF Frequency Synthesizer and Transmitter for Cellular Phones”, Seminar (1-hr) presented at University of Texas at Austin, Austin, TX, USA, 6 Mar. 2006.
[8] R. B. Staszewski, “Digital RF Processor (DRP™) for Cellular Phones”, Seminar (1-hr) presented to IEEE Circuits and Systems Society, Dallas Chapter, Dallas, TX, USA, 22 Feb. 2006.
[9] R. B. Staszewski, “Digital RF Processor (DRP™) for Cellular Phones”, Presentation (1-hr) at the GIRAFE Forum at IEEE Solid-State Circuits Conf.(ISSCC), San Francisco, CA, USA, 5 Feb. 2006.
2005
[1] R. B. Staszewski, “All-Digital RF Frequency Synthesizer and Transmitter for Cellular Phones”, Seminar (1-hr) presented at Massachusetts Institute of Technology, Microsystems Technology Lab, Cambridge, MA, USA, 29 Nov. 2005.
[2] R. B. Staszewski, “Wireless SoC: Digital Radio Processor Alternative to Conventional RF”, 3-hour tutorial presented at IEEE Fifth Intl. Workshop on SoC for Real-Time Applications, Banff, Alberta, Canada, 21 Jul. 2005.
[3] R. B. Staszewski, “All-Digital RF Frequency Synthesizer and Transmitter for Cellular Phones”, Seminar (1-hr) presented at University of California at Los Angeles, Los Angeles, CA, USA, 15 Jun. 2005.
[4] R. B. Staszewski, “A Digitally-Intensive Wireless Transceceiver Architecture”, Seminar (1-hr) presented at a summer retreat of University of California at Berkeley, Lake Tahoe, CA, USA, 7 Jun. 2005.
[5] R. B. Staszewski, “All-Digital PLL and GSM/EDGE Transmitter in 90nm CMOS”, Seminar (30-min) presented to IEEE Solid State Circuit Society, Dallas Chapter, Dallas, TX, USA, 13 May 2005.
2004
[1] R. B. Staszewski, “Phase-Locked Loop”, Graduate for-credit course lecture (1-hr) presented at University of Texas at Dallas, Richardson, TX, USA, 15 Nov. 2004.
[2] R. B. Staszewski, “Digital Radio Processor (DRP™) Alternative to Conventional RF”, Seminar (1-hr) presented to IEEE Circuits and Systems Society, Dallas Chapter, Dallas, TX, USA, 8 April 2004.
[3] R. B. Staszewski, “All-Digital Phase-Domain TX Frequency Synthesizer for Bluetooth Radios in 0.13µm CMOS”, Seminar (30-min) presented to IEEE Solid State Circuit Society, Dallas Chapter, Dallas, TX, USA, 16 Apr. 2004.
[4] R. B. Staszewski, “Novel Architecture of an All-Digital Transmitter and a Discrete-Time Receiver for Wireless Applications”, Seminar (1-hr) presented at Texas A&M University, College Station, TX, USA, 8 Mar. 2004.
[5] R. B. Staszewski and K. Muhammad, “Novel Architecture of an All-Digital Transmitter and a Discrete-Time Receiver for Wireless Applications”, Seminar (30-min) presented at University of Texas at Dallas, Richardson, TX, USA, 4 Mar. 2004.
2001
[1] R. B. Staszewski, “Implementation of an FIR Filter for Disk Drive Read Channel”, Seminar (1-hr) presented to IEEE Magnetics Society, Univ. of Colorado at Boulder, Boulder, CO, USA, 24 Sept. 2001